PURE DATA LTD.
PDI9025-16
|
NIC Type |
Token-Ring |
|
Transfer Rate |
4/16Mbps |
|
Data Bus |
16-bit ISA |
|
Topology |
Ring |
|
Wiring Type |
Shielded/Unshielded twisted pair |
|
Boot ROM |
Available |
|
INTERRUPT REQUEST | ||||||||||
|
IRQ |
JP3A |
JP3B |
JP3C |
JP3D |
JP3E |
JP3F |
JP3G |
JP3H |
JP3I | |
|
3 |
Closed |
Open |
Open |
Open |
Open |
Open |
Open |
Open |
Open | |
|
4 |
Open |
Closed |
Open |
Open |
Open |
Open |
Open |
Open |
Open | |
|
5 |
Open |
Open |
Closed |
Open |
Open |
Open |
Open |
Open |
Open | |
|
6 |
Open |
Open |
Open |
Closed |
Open |
Open |
Open |
Open |
Open | |
|
7 |
Open |
Open |
Open |
Open |
Closed |
Open |
Open |
Open |
Open | |
| » |
2/9 |
Open |
Open |
Open |
Open |
Open |
Closed |
Open |
Open |
Open |
|
10 |
Open |
Open |
Open |
Open |
Open |
Open |
Closed |
Open |
Open | |
|
11 |
Open |
Open |
Open |
Open |
Open |
Open |
Open |
Closed |
Open | |
|
12 |
Open |
Open |
Open |
Open |
Open |
Open |
Open |
Open |
Closed | |
|
DMA CHANNEL | |||||||
|
Channel |
JP4A |
JP4B |
JP4C |
JP4D |
JP4E |
JP4F | |
| » |
DMA5 |
Open |
Open |
Closed |
Open |
Open |
Closed |
|
DMA6 |
Open |
Closed |
Open |
Open |
Closed |
Open | |
|
DMA7 |
Closed |
Open |
Open |
Closed |
Open |
Open | |
|
CARD TIMING | ||
|
Setting |
JP6 | |
| » |
Oscillator select internal (6MHz) |
Pins 2 & 3 Closed |
|
Oscillator select external (Host bus speed of 8 or 10MHz) |
Pins 1 & 2 Closed | |
|
BOOT ROM SIZE | |||
|
ROM size |
JP11 |
JP12 | |
| » |
8/16KB |
Pins 2 & 3 Closed |
Pins 2 & 3 Closed |
|
32KB |
Pins 1 & 2 Closed |
Pins 2 & 3 Closed | |
|
64KB |
Pins 1 & 2 Closed |
Pins 1 & 2 Closed | |
|
BOOT ROM | |
|
Setting |
JP13 |
|
Disabled |
Pins 2 & 3 Closed |
|
Enabled |
Pins 1 & 2 Closed |
|
ALTERNATE/PRIMARY CARD SELECT | ||||
|
Setting |
Address |
Boot ROM Address |
JP14 | |
| » |
Primary |
0A20-0A2Fh |
D0000-D7FFFh |
Pins 2 & 3 Closed |
|
Alternate |
1A20-1A2Fh |
D8000-DFFFFh |
Pins 1 & 2 Closed | |
|
BRIDGE PAL ENABLED | ||
|
Setting |
JP15 | |
| » |
Bridge PAL disabled |
Pins 2 & 3 Closed |
|
Bridge PAL enabled |
Pins 1 & 2 Closed | |
|
Note:If installing two cards for a bridge configuration, both cards must be set to enable the bridge PALs and bridge PAL chips must be installed at UE5 of each card. | ||