HwMuseum | Index

LONGSHINE MICROSYSTEM, INC.

LCS-8634TBA (REV.A1)

NIC Type

Ethernet

Transfer Rate

10Mbps

Data Bus

16-bit ISA

Topology

Star

Wiring Type

RG58A/U 50ohm coaxial

AUI transceiver via DB-15 port

Unshielded twisted pair

Boot ROM

Available

BOOT ROM

Setting

JP5

»

Disabled

Open

 

Enabled

Closed

COMPATABILITY MODE

Setting

JP4

»

Disabled

Open

 

Enabled

Closed

Note: If your system does not work with this card, set this option to enabled (closed).

CABLE TYPE

Type

JP2

JP89-F

Unshielded twisted pair

Closed

Optional

RG58A/U 50ohm coaxial

Open

Pins 1 & 2 closed

AUI transceiver via DB-15 port

Open

Pins 2 & 3 closed

INTERUPT REQUEST

IRQ

JP1A

JP1B

JP1C

JP1D

JP1E

JP1F

JP1G

JP1H

»

3

Open

Open

Open

Open

Open

Open

Open

Closed

 

4

Open

Open

Open

Open

Open

Open

Closed

Open

 

5

Open

Open

Open

Open

Open

Closed

Open

Open

 

9

Open

Open

Open

Open

Closed

Open

Open

Open

 

10

Open

Open

Open

Closed

Open

Open

Open

Open

 

11

Open

Open

Closed

Open

Open

Open

Open

Open

 

12

Open

Closed

Open

Open

Open

Open

Open

Open

 

15

Closed

Open

Open

Open

Open

Open

Open

Open

BASE MEMORY ADDRESS

Base Address

JP7A

JP7B

JP7C

JP7D

JP7E

»

C800h

Pins 1 & 2

Pins 1 & 2

Pins 2 & 3

Pins 1 & 2

Pins 1 & 2

 

CA00h

Pins 2 & 3

Pins 1 & 2

Pins 2 & 3

Pins 1 & 2

Pins 1 & 2

 

CC00h

Pins 1 & 2

Pins 2 & 3

Pins 2 & 3

Pins 1 & 2

Pins 1 & 2

 

CE00h

Pins 2 & 3

Pins 2 & 3

Pins 2 & 3

Pins 1 & 2

Pins 1 & 2

 

D000h

Pins 1 & 2

Pins 1 & 2

Pins 1 & 2

Pins 2 & 3

Pins 1 & 2

 

D200h

Pins 2 & 3

Pins 1 & 2

Pins 1 & 2

Pins 2 & 3

Pins 1 & 2

 

D400h

Pins 1 & 2

Pins 2 & 3

Pins 1 & 2

Pins 2 & 3

Pins 1 & 2

 

D600h

Pins 2 & 3

Pins 2 & 3

Pins 1 & 2

Pins 2 & 3

Pins 1 & 2

 

D800h

Pins 1 & 2

Pins 1 & 2

Pins 2 & 3

Pins 2 & 3

Pins 1 & 2

 

DA00h

Pins 2 & 3

Pins 1 & 2

Pins 2 & 3

Pins 2 & 3

Pins 1 & 2

 

DC00h

Pins 1 & 2

Pins 2 & 3

Pins 2 & 3

Pins 2 & 3

Pins 1 & 2

 

DE00h

Pins 2 & 3

Pins 2 & 3

Pins 2 & 3

Pins 2 & 3

Pins 1 & 2

Note:Pins designated should be in the closed position.

I/O BASE ADDRESS

Address

JP6A

JP6B

JP6C

»

300h

Pins 1 & 2 closed

Pins 1 & 2 closed

Pins 1 & 2 closed

 

320h

Pins 2 & 3 closed

Pins 1 & 2 closed

Pins 1 & 2 closed

 

340h

Pins 1 & 2 closed

Pins 2 & 3 closed

Pins 1 & 2 closed

 

360h

Pins 2 & 3 closed

Pins 2 & 3 closed

Pins 1 & 2 closed

 

380h

Pins 1 & 2 closed

Pins 1 & 2 closed

Pins 2 & 3 closed

 

3A0h

Pins 2 & 3 closed

Pins 1 & 2 closed

Pins 2 & 3 closed

 

3C0h

Pins 1 & 2 closed

Pins 2 & 3 closed

Pins 2 & 3 closed

 

3E0h

Pins 2 & 3 closed

Pins 2 & 3 closed

Pins 2 & 3 closed

LINK INTEGRITY TEST

Setting

JP3

»

Enabled

Pins 2 & 3 closed

 

Disabled

Pins 1 & 2 closed